Analog-to-Digital Converters [“ADCs”] are conventionally used to convert analog electronic signals, typically input voltages, into digital signals for use in a wide variety of electronic devices. Recently, it has become desirable to reduce power consumption of electronic device components, such as ADCs, to conserve chip space and to increase battery life of electronic devices. This can be done, for example, by reducing the supply voltage of the ADC. As the supply voltage of an ADC decreases, however, there is a need for substantially constant signal swing in order to preserve an acceptable signal-to-noise ratio. When the signal strength decreases due to reduced supply voltage, the signal-to-noise ratio may become too small and cause the signal to become unusable.
There are additional considerations, other than signal-to-noise ratio, that should be accounted for when designing an ADC with reduced supply voltage. Although additional components may be added to the ADC, it is desirable to minimize the number of additional components in order to conserve chip space. Power consumption may also be a concern when adding additional components, because reduced supply voltage substantially translates into less voltage available for use to power these additional components.
The power consumption of an ADC may also be affected by the feedback factor of the ADC. The feedback factor is the ratio of the capacitance of the feedback capacitors used in ADC feedback phase. A greater feedback factor is desirable, because an increased feedback factor can allow a smaller (i.e., less power-consuming) op-amp to have the same settling speed as a larger op-amp, where settling speed refers to how quickly the output settles to its final value.